Divide operator in Constraints

SystemVerilog
,
1

Ratio of A and B should be 1/1.5/3 . Why the below constraint isn’t working as expected?

class try;
  
  rand int A, B;
  
  constraint value_range {
    A inside {[0:200]};
    B inside {[0:200]};  }
   constraint ratio_constraint {
     A / B inside {1, 3}; }
endclass

module mod ();

  initial begin
    try obj = new;
    obj.randomize();
    $display("A = %0d, B = %0d", obj.A, obj.B);
    
    $finish;
  end
endmodule

Thanks.

2

In reply to verif_guy12:
It would help to show differences in results between what you are expecting and what you are seeing.

One problem is you may have is doing integer division. You need to scale the numbers up.

class try;
  rand int A, B;
  constraint value_range {
    A inside {[0:200]};
    B inside {[1:200]};  } // prevent divide by 0
   constraint ratio_constraint {
     A*1000/ B inside {1000, 3000}; }
endclass
module mod ();
  initial repeat (20) begin
    static try obj = new;
    assert(obj.randomize());
    $display("A = %0d, B = %0d", obj.A, obj.B);
  end
endmodule
3

In reply to dave_59:

Thank you Dave, This helps.
But A and B are actually 2 clock frequencies and with above code change I am getting A = 12000 , B = 3999

A/B = 3.000750187

Expectation is that ratio of these two frequencies has to be exact 1,1.5,2,3,4
A inside {[3000:12000]}
B inside {[2550:4000]}

Would appreciate any suggestions.

4

In reply to verif_guy12:

  constraint value_range {
    A inside {[3000:12000]};
    B inside {[2550:4000]};
  }
  constraint ratio_constraint {
    (A * 1000) % B == 0; //New
    (A * 1000) / B inside {1000, 1500, 2000, 3000, 4000};
  }

This additional constraint worked for me.