Difference of reset/configure/main/shutdown phases and run phase

UVM
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1

Are sub processes inside (pre/post_)reset/configure/main/shutdown phases are automatically killed when they finish?

Take the following TB for example.

`include "uvm_macros.svh"
module tb;
    import uvm_pkg::*;
        
    class my_test extends uvm_test;

        function new(string name, uvm_component parent);
            super.new(name, parent);
        endfunction

        `uvm_component_utils(my_test)

        virtual task run_phase(uvm_phase phase);
            phase.raise_objection(this, "Starting Run Phase");
            fork
                forever begin
                    `uvm_info(this.get_type_name(), "Run Phase", UVM_MEDIUM)
                    #100ns;
                end
            join_none
            #1us;
            phase.drop_objection (this, "Ending Run Phase");
        endtask

        virtual task main_phase(uvm_phase phase);
            phase.raise_objection(this, "Starting Main Phase");
            fork
                forever begin
                    `uvm_info(this.get_type_name(), "Main Phase", UVM_MEDIUM)
                    #100ns;
                end
            join_none
          //#1us;
            phase.drop_objection (this, "Ending Main Phase");
        endtask

    endclass

    initial run_test("my_test");

endmodule;

Then, the followng is gotten.

UVM_INFO @ 0: reporter [RNTST] Running test my_test...
UVM_INFO tb.sv(17) @ 0: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(29) @ 0: uvm_test_top [my_test] Main Phase
UVM_INFO tb.sv(17) @ 100: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(17) @ 200: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(17) @ 300: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(17) @ 400: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(17) @ 500: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(17) @ 600: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(17) @ 700: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(17) @ 800: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(17) @ 900: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(17) @ 1000: uvm_test_top [my_test] Run Phase

Message of main_phase() is printed only once. It looks forever loop inside main_phase() is killed when it finishes. It is not the case if run_phase() finishes immediately.

UVM_INFO @ 0: reporter [RNTST] Running test my_test...
UVM_INFO tb.sv(17) @ 0: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(29) @ 0: uvm_test_top [my_test] Main Phase
UVM_INFO tb.sv(17) @ 100: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(29) @ 100: uvm_test_top [my_test] Main Phase
UVM_INFO tb.sv(17) @ 200: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(29) @ 200: uvm_test_top [my_test] Main Phase
UVM_INFO tb.sv(17) @ 300: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(29) @ 300: uvm_test_top [my_test] Main Phase
UVM_INFO tb.sv(17) @ 400: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(29) @ 400: uvm_test_top [my_test] Main Phase
UVM_INFO tb.sv(17) @ 500: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(29) @ 500: uvm_test_top [my_test] Main Phase
UVM_INFO tb.sv(17) @ 600: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(29) @ 600: uvm_test_top [my_test] Main Phase
UVM_INFO tb.sv(17) @ 700: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(29) @ 700: uvm_test_top [my_test] Main Phase
UVM_INFO tb.sv(17) @ 800: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(29) @ 800: uvm_test_top [my_test] Main Phase
UVM_INFO tb.sv(17) @ 900: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(29) @ 900: uvm_test_top [my_test] Main Phase
UVM_INFO tb.sv(17) @ 1000: uvm_test_top [my_test] Run Phase
UVM_INFO tb.sv(29) @ 1000: uvm_test_top [my_test] Main Phase

forever loop is alive even after the finish of run_phase() unlike main_phase().

In that sense, we cannot say main_phase() is same as run_phase()?

Here is EDA playground example.

2

UVM phase processes are terminated once there are no objections raised to the phase’s execution, and no sub-phases have raised objections. The main_phase is a sub-phase of the run_phase.