Constraint solver error using the config object of subsequence in the nested sequence and subsequence that inherited the base sequence

In reply to YMNKY:

the problem is the my_config object is not created before it is being used in the constraint in the base class.
It is not a good practice to create object in the constructor. Please use some recommend place to create object for my_cfg class before it is being used in the base class.

I just captured the minimum required code to replicate the issue and fix it.
If you remove the my_cfg object create method in the base_seq constructor, you will get the error you faced and uncomment to get it fixed.

Here is the code below.
import uvm_pkg::*;
`include “uvm_macros.svh”
typedef class my_config;
class my_item extends uvm_sequence_item;
rand bit [31:0] dummy;
endclass : my_item

class base_seq extends uvm_sequence#(my_item);
// control knobs
rand bit [11:0] line_addr;

// configuration handle
my_config cfg;

`uvm_object_utils(base_seq)
// constraints
constraint line_addr_c {line_addr >=0; line_addr < cfg.sim_line;}

function new(string name = "base_seq");
    super.new(name);
    <font size=20>**_cfg = my_config::type_id::create("cfg", null);_**</font>
endfunction : new

virtual task pre_start();
    if(!uvm_config_db #(my_config)::get(get_sequencer(), get_sequence_path(), "cfg", cfg))
        `uvm_fatal(get_type_name(), "Failed to get configuration")
endtask

endclass : base_seq
class my_config extends uvm_object;
int sim_line = 16;
`uvm_object_utils(my_config)

function new(string name = "my_config");
    super.new(name);
endfunction : new

endclass : my_config

module tb();
import uvm_pkg::*;
`include “uvm_macros.svh”

base_seq m_base;
my_config cfg;

initial begin
    uvm_config_db #(my_config)::set(null, "*", "cfg", cfg);
    m_base = base_seq::type_id::create("m_base", null);
    void'(m_base.randomize());
end

endmodule : tb