Constraint for 32 bit addr to be different than prev addr by 2 bits

SystemVerilog
,
13

In reply to dave_59:

I believe this won’t work for 1st randomize ( previous value of addr is 0 )


 !((const'(addr) + 4) inside {[200:800]})

would return 1 . Hence we would have ::


addr == const'( addr ) + 4  ; // Basically Constraints addr to 4

Now this conflicts constraint ::


addr inside {[200:800]} ;