In reply to ben@SystemVerilog.us:
Hi Ben,
Ive been following your book on assertions(SystemVerilog Assertions Handbook, 4th Edition) and on page 331 it says:
property period_chk;
realtime current_time, deltat;// deltat used for debug, as a temp
('1,current_time = $time) ##1 (1, deltat=current_time) ##0 deltat == 10ns;
endproperty ap_time:
assert property(@(posedge clk) period_chk);
should there be a difference in the underlined portion.
regards
Vijay