In reply to sandeep1291:
This kind of situation generally occur with the latency in design.
Possible two way to verify:
1). use assertion.
2). use pipelining: store continuous input to temp registers and check appropriate value.
Example:
temp1<=B;
temp2<=temp1;
temp3<=temp2;
.
.
if(!reset)
// don’t check
else
if(a==temp4) // please take-care of latency…
// correct
else
// error
thanks