Can we access DUT signals in sequence class

UVM
,
1

can we access DUT signals in sequence class? if yes then how?

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mukesh

2

In reply to muku_383:

Can you? Yes.

Should you? No. You should only access signals using an agent’s driver or monitor.

3

In reply to cgales:

as you said,
can i? yes, can you give explanation with example

–
thanks

4

In reply to muku_383:

You can do this because the UVM does not have compliance rules. But it is useless to do this and it complicates your testbench and the sequence execution.

5

Hi Muku_383,
Ideally you should not access them from sequence as it kills the reuse feature for next gen Testbench.

But there is a provision.

  1. Set the interface in top.sv with null and scope as ‘*’
  2. get the interface inside the base_sequence body() method using get_full_name() so that seqr path will come

Then you are able to use that wherever necessary.