Associative array of associative arrays

SystemVerilog
,
1

I tried creating an associative array of associative arrays. It leads to a compiler error. Doesn’t SystemVerilog allow this?

2

In reply to Krishna9:

Yes, SystemVerilog allows multi-dimension associative arrays.

It would really help to show a complete example showing the behavior you are seeing.

3

In reply to cgales:

class testing;
  
  typedef int array1[];
  
  typedef array1 array2[int];
  
  array2 array3[int];
  
  function new;
    array3[0[0]] = new[8];
  endfunction
  
  
class :testing
4

In reply to Krishna9:

You have two typos in the code shown. You have a closing square bracket in the wrong position, and you are missing an endclass.

class testing;
  typedef int array1[];
  typedef array1 array2[int];
  array2 array3[int];
  function new;
    array3[0][0] = new[8];
  endfunction
 
endclass :testing