Assertion to check valid transition from value A to value B on a bus and this transition is only valid when strobe is high. If I try to use $past(bus== A) -> (bus ==B) & (strobe ==1). It does not work

SystemVerilog
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In reply to ben@SystemVerilog.us:

Hi Ben,
I am sorry for not being very clear.Here are the requirements.

  1. Bus should change its value when strobe is high. Else assertion should generate error.
  2. When strobe is high , if bus changes 2’b00 to 2’b10 it is valid. But if it changes to any other value assertion should generate error.

Thanks
Shals