In reply to syed taahir ahmed:
The assertion reflects the requirements:
ref files : http://systemverilog.us/vf/pulses2c.sv
http://systemverilog.us/vf/pulses2c.png
// master_prop states that pulse1 extends between 10 and 100 cycles, and within that region,
// you have ONE occurrence of pulse2=1 and then pulse2==1 possibly being repeated 1 to $.
pulse1[*10:100] intersect( pulse2[->1] ##1 pulse2==0[*1:$])
// That property is ian intersection, thus, with pulse1==1 at all cycles within that range,
// once pulse2==1 and then pulse2=0, THAT intersection is complete and the assertion succeeds.
// All we asked here is that plse2 occurs within pulse1[*10:100] but not within pulse1[*100]
property master_prop;
@ (posedge clk)
disable iff (reset)
$rose(pulse1)[->1] |-> pulse1[*10:100] intersect( pulse2[->1] ##1 pulse2==0[*1:$]);
endproperty
//---------
// Now, what you may be looking for is that pulse1 holds (true) for 100 cycels
// and within that period pulse2 is a single pulse.
property master_prop2;
@ (posedge clk)
disable iff (reset)
$rose(pulse1)[->1] |-> pulse1[*100] intersect( pulse2[->1] ##1 pulse2==0[*1000]);
endproperty
//--------
// However, if you still want pulse1 to be the range 10:100, you could add another assertion
// that once pulse1 occurrs, there should s single pulse2 until pulse1 falls.
ap_continue: assert property(@ (posedge clk) $rose(pulse1)[->1] |->
$fell(pulse1)[->1] intersect(pulse2[->1] ##1 pulse2==0[*1:$]));
Assertions can be tricky! That is why you need to test the complex ones and really understand the meaning behind the syntax.
Ben Cohen
http://www.systemverilog.us/ ben@systemverilog.us
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- A Pragmatic Approach to VMM Adoption 2006 ISBN 0-9705394-9-5
- Using PSL/SUGAR for Formal and Dynamic Verification 2nd Edition, 2004, ISBN 0-9705394-6-0
- Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn 978-1539769712
- Component Design by Example ", 2001 ISBN 0-9705394-0-1
- VHDL Coding Styles and Methodologies, 2nd Edition, 1999 ISBN 0-7923-8474-1
- VHDL Answers to Frequently Asked Questions, 2nd Edition ISBN 0-7923-8115
- SVA Alternative for Complex Assertions
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