In reply to ben@SystemVerilog.us:
A useful comment by a colleague.
Should you shift it into log from the right?
Also, I am not sure about the actual requirement. Is it to detect the sequence to be used somewhere, or fail any time it does not match?
I think for detection it would be better to use a cover and use the action block to signal it to whatever needs this info.
[Ben] I agree with the use of the cover instead of the assert.
As to the direction of the shift, you are correct.
In any case, the approach is correct.