In reply to Thirumal:
I believe you have the following requirement ::
typedef enum bit [1:0] {ADD, SUB,MUL , DIV} opcode_type; // Missing keyword ' bit ' above
opcode_type opcode;
covergroup gc ; // sample() Must be called
same:coverpoint opcode
{
bins id_0 = ( ADD => ADD ) ;
bins id_1 = ( SUB => SUB ) ;
bins id_2 = ( MUL => MUL ) ;
bins id_3 = ( DIV => DIV ) ;
}
diff:coverpoint opcode
{
bins id_0 = ( ADD => [ SUB : DIV ] ) ;
bins id_1 = ( SUB => ADD ) , ( SUB => [ MUL : DIV ] ) ; // 3 transitions covered by single bin
bins id_2 = ( MUL => [ ADD : SUB ] ) , ( MUL => DIV ) ; // 3 transitions covered by single bin
bins id_3 = ( DIV => [ ADD : MUL ] ) ;
}
endgroup
All the bins we define may hit once or many a times in the entire simulation time but we want all of them to hit at the same time.
I am not clear on this . At a particular time how can a transaction have ALL opcodes at once ? It’s 4-bit type so can have only 1 value at a time .
For the above code only 1 bin out of the 8 can he hit at a particular time .
**You could also merge the 4 bins within each coverpoint to a single bin but that would give you total of 2 bins ( 1 within each coverpoint ) .
Even in that case only 1 out of 2 bins would be covered at a time .
**