All Values of a coverpoint need to be hit at same time

SystemVerilog
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3

Thanks Shubhabrata for the reply.
I think you got it in a different way. Let me make it clear.

bit [3:0] id;
typedef enum[1:0] {ADD, SUB,MUL} opcode_type;
opcode_type opcode;
covergroup g;

// Same and Diff opcodes means back to back same and diff opcodes.
Same_opcode_with_all_16_ids_at_same_time : coverpoint id { bins id_0= {0} with (opcode_prev= opcode);
......
bins id_15 = {15} with (opcode_prev = opcode);

Diff_opcode_with_all_16_ids_at_same_time : coverpoint id { bins id_0= {0} with (opcode_prev != opcode);
......
bins id_15 = {15} with (opcode_prev != opcode);


endgroup

//sampling the cg

This might work but this is not what we expect. All the bins we define may hit once or many a times in the entire simulation time but we want all of them to hit at the same time.

Thanks