Perfectly true. This is the svh agent:
hdl_status = uvm_hdl_read("hdl_top.DUT.abc_fsm_inst.state_r", hdl_data);
...
hdl_status = uvm_hdl_read("hdl_top.DUT.abc__fsm_inst.state_stdv_s", hdl_data);
....
hdl_status = uvm_hdl_read("hdl_top.DUT.abc_fsm_inst.shift_cnt_r", hdl_data);
..
hdl_status = uvm_hdl_read("hdl_top.DUT.abc_fsm_inst.shift_cnt_stdv_s", hdl_data);
vhdl signals & conversion
SIGNAL sck_cnt_r :INTEGER RANGE 0 TO (2**cfg_sclk_div_cnt_i'LENGTH) := 1;
SIGNAL sck_cnt_stdv_s :STD_LOGIC_VECTOR(cfg_sclk_div_cnt_i'LENGTH-1 DOWNTO 0);
SIGNAL shift_cnt_r :INTEGER RANGE 0 TO ADC_DATA_BW_C := 0;
SIGNAL shift_cnt_stdv_s:STD_LOGIC_VECTOR(INTEGER(CEIL(LOG2(REAL(ADC_DATA_BW_C))))-1 DOWNTO 0);
state_stdv_s <= state2stdv(state_r);
shift_cnt_stdv_s <= STD_LOGIC_VECTOR(TO_UNSIGNED(shift_cnt_r,shift_cnt_stdv_s'LENGTH));
sck_cnt_stdv_s <= STD_LOGIC_VECTOR(TO_UNSIGNED(sck_cnt_r,sck_cnt_stdv_s'LENGTH));
Questa output
# UVM_INFO D:/...[READ HDL PATH shift_cnt]] shift_cnt_r: 0x00000000 - Status: 1 - shift_cnt_stdv_r: 0x00000000 - Status: 1
# UVM_INFO D:/... [READ HDL PATH state]] state_r: 0x00000000 - Status: 1 - state_stdv_s: 0x00000000 - Status: 1
Please advise.