Hey!
I’m interested ways to solve problem with pipeline interface (AHB-like).
I want to use regmodel with access registers in back-2-back way.
Maybe you know some papers about that?
At first sight it’s not trivial…
In reply to maxiale:
Interesting topic, but if I remember correctly, AHB/APB bus interface doesnt support outstanding access (back2back), only AXI, right? Correct me if I’m wrong? I think, back2back can be configured in agent suoported by vendors such as Cadence, Questa, …
In reply to cuonghl:
Nope, AHB support pipelined b2b, when u set next address and set/get data to/from previous trans in same clock.
But I don’t know how it must be used with RAL. Only tricks with extension, but it’s looks like bad designed UVM lib…