Hi!
I would like to know if it’s possible to configure uvm_reg to use separate BFMs/drivers for reads and writes. The register is mapped to just one address, but uses different BFMs for read and write. A typical example for this are registers accessible via an AXI interface, where you can have separate BFMs for the read and write channels.
I tried to browse the source code, but it seems both do_read() and do_write() uses the same source for the address map. And I don’t think I can create separate address maps for read and write.
Thanks in advance.
Regards,
Jon
You can totally use two maps, but your going to need to add support code to make sure that you’re not trying to read through the write map and vice-versa. It’s also going to make doing operations more verbose, because you’ll always need to do some_reg.write(…, .map(write_map). You’re best off avoiding it.
What I’d do is handle this with another layer on top of you BFMs. I’m guessing you have separate sequencers for your read/write channels. What you can do is create a super-sequencer that contains handles to both of these and can dispatch a started operation to the appropriate sequencer. You might need to create a new sequence item that contains this direction information (if you don’t already have it). You can then associate this sequencer with your register address map.