[Register Models]: Is there a way to automate the generation of backdoor paths for registers?

UVM
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1

Hi all,

I’m trying to generate register models for all levels of a chip. Is there a set method or way of generating backdoor paths i.e: using the add_hdl_path(rtl_hierarchy) at all levels - both subsystem and SOC? Or can it only be done manually by looking at RTL hierarchies?

Thanks in advance

2

In reply to udhay_sankar:

There is, but it depends on what tools were used to generate the RTL register models and if they have the capability to generate UVM registers as well. Check with your tool vendor.