Error in task(run_phase)

Hello everyone,

I am a beginner in UVM and I was playing around with a few examples on the net. However, I got stuck in this weird issue of a syntax error. In my monitor I have a task, wherein, I have a counter which is of datatype integer. But I keep getting a syntax error. I tried everything but nothing worked! I am not sure if the UVM part has been coded correctly or not. That’s why I need help with this (maybe I am missing something very basic in this) I have attached the code as well as the error I am getting. I am running all this on edaplayground with VCS 2014.12 as the simulator. Thanks!

virtual task run_phase (uvm_phase phase);

adder_transaction a_tx;
a_tx = adder_transaction::type_id::create(.name("a_tx"), .contxt(get_full_name()));
integer counter;		
        vif.a = 0'b0;
		vif.b = 0'b0;

		if (vif.clk == 1) begin
  			counter = counter + 1;
		end

  		if (counter % 5 == 0) begin
    		seq_item_port.get_next_item(a_tx);
  				vif.a = $random;
  				vif.b = $random;
    		seq_item_port.item_done();
		end
	
		//Send the transaction to the analysis port
		mon_ap_before.write(a_tx);

endtask: run_phase

Error-[SE] Syntax error Following verilog source has syntax error : "testbench.sv", 154: token is 'integer' integer counter;

You need to just reorder your lines of code.

integer counter;

should be placed before

a_tx = adder_transaction::type_id::create(.name("a_tx"), .contxt(get_full_name()));

But one more point, your code inside the run_phase did not make much sense to me, as counter would never be incremented higher than 1. Just a heads up!!

  • Ashith

In reply to Ashith:

Thanks a lot Ashith…this did solve my issue.

And this is just something I am trying out. I am not bothered with the exact functionality of the code as of now. All I want to do is run the UVM environment I have created, functionality will be next. But thanks for the heads up!!! :-)

I do want to ask you that how did you know that I had to place the declaration before. As I am not using it in that line anywhere. Would really appreciate it if you could provide an explanation.

Thanks,
Subrat

In reply to subratndash:

All the declaration of the variation must be at the start of a begin - end. After that all the assignment statements can come. Else you would get this error.

Usage can be anywhere.

  • Ashith

In reply to Ashith:

Thanks for the explanation Ashith

-Subrat