Writing into memory and reading from memory

SystemVerilog
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8

In reply to basilleaf:

  1. The write and read tasks look identical with the exception of the $display() calls at the end. Can you explain what the differences in the two tasks are?
  2. You create new ‘c1’ handles within each task. Are you expecting to be using the same ‘c1’ in both tasks?
  3. As Dave commented, there is nothing in the read task which modifies byte_data. You will display the value passed into the task, which in this case is ‘0’. Everything is working as coded.