Writememh in system verilog

SystemVerilog
1

Hi All,
I was trying to use in my sv file “$writememh” to laod the .dat file with random data from mem as below:
bit [7:0] mem[255:0];
$writememh(“.dat”,mem);

I get the error:An expression with an unpacked array data type is not allowed in this context
Did any body faced the same problem and how to resolve it …? Note:simulation done with ncsim

Thanks.

2

I was able to run that code. Perhaps it is a tool/version specific issue.