Write a constraint that assigns data to any address sequence that follows an arithmetic progression (ex: 1,5,9,13,17.. so a[1]=30, a[5]=30, a[9]=30 and so on))

SystemVerilog
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1

came up with this question when thinking of how i could include arithmetic progressions in constraints.

2

I’m not sure if it is the right approach using randomization when generating deterministic patterns. You are restricting the RPG to do that.
The better apraoch is to write a function which generates your pattern directly.

3

I could say that writing data into even locations of a memory is also deterministic, which is mostly always done using constraints. My question is still valid I believe.

4

But there is a difference stressing a random-pattern-generator instead of using a simple function calculating your data.

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5

Constraining to deterministic behavior has a use: say you’re in a UVM environment, and need to specify an exact pattern of stimulus. You extend the transaction class with the additional constraints, then use a factory override to deploy it. The rest of the testbench needs no changes.

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6 

typedef bit[42:0] T; // whatever you need
rand T a;
constraint progression { 
   a = my_function(const'(a)); // a is a function of its previous value
}
function T my_function(T in);
   return in; // whatever you need to do. 
endfunction
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