Why uvm_object_registry is called as lightweight proxy?

UVM
1

Hi ,

As per the UVM Library code, uvm_object_registry is called a lightweight proxy.

//------------------------------------------------------------------------------
//
// CLASS: uvm_object_registry #(T,Tname)
//
// The uvm_object_registry serves as a lightweight proxy for a <uvm_object> of
// type ~T~ and type name ~Tname~, a string. The proxy enables efficient
// registration with the <uvm_factory>. Without it, registration would
// require an instance of the object itself.
//
// See section below for information on using uvm_component_registry.
//
//------------------------------------------------------------------------------

However, As per the class definition :

local static this_type me = get();

// Function: get//// Returns the singleton instance of this type. Type-based factory operation// depends on there being a single proxy instance for each registered type.

static function this_type get();
  if (me == null) begin
    uvm_coreservice_t cs = uvm_coreservice_t::get();
    uvm_factory factory=cs.get_factory();
    me = new;
    factory.register(me);
  end
  return me;
endfunction

Here, Inside get() function, we are creating object of this class. Then, Why it is called as lightweight proxy?

Thanks,

Meet

2

I’m assuming you are asking because it appears that the uvm_component_registry object does not seem to actually be “lightweight”.

Can you check if these points help?

  1. this_type is a static (per-type singleton) variable of the uvm_component_registry#(T,Tname) type, not the uvm_object type it is serving as proxy for.
  2. The uvm_component_registry#(T,Tname)class does not extend uvm_object. Instead, it extends uvm_object_wrapper. There are no non-static variables I can find, so its objects are very lightweight, needing only a vtable pointer (or whatever the simulator uses instead) and whatever else each SystemVerilog object is required to have by the simulator.