Why does declaration and initialization of an automatic variable after allocation of dynamic array with a task fail compilation?

SystemVerilog
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1

When creating the described task below within an interface, I get a compilation error when declaring and initializing a local automatic variable x before allocating a dynamic array that has already been declared. Here is an example of what I attempted at first:

interface example();

    logic data[]

    task example_task(int length);
        
        data = new[length]; 
        automatic bit x = 0;
        
    endtask: example_task

endinterface: example

After learning more about default lifetime allocations and researching syntax for tasks, I switched the allocation and initialization before almost giving up and it fixed the issue.

interface example();

    logic data[]

    task example_task(int length);

        automatic bit x = 0;
        data = new[length]; 
        
    endtask: example_task

endinterface: example

My question is, why does switching these two lines of code impact how the compiler sees it. Is there a reference into where variables need to be declared / initialized within a task? Thanks. *Edited

2

In reply to eguevara:

This is because the syntax (BNF) requires declarations to appear before procedural statements. It has nothing to do with variable lifetimes.