Why can an interface be recognized in a package, but a class cannot

In reply to jianfeng.he:

SystemVerilog supports separate compilation using compiled units.
compilation unit: A collection of one or more SystemVerilog source files compiled together.
The following items are visible in all compilation units: modules, primitives, programs, interfaces, and packages.

Try to add class AA declaration inside package. And use: import pkgBla::* in bfm_base_pkg