Failing at initial stage means @5ns , because unable to execute $past condition.
but it must be pass at @15ns -
1800: $past returns the sampled value of expression1 in a particular time step strictly prior to the one in which $past is evaluated (see 16.5.1 for the definition of sampling in past clock ticks). If number_of_ticks equals k and if ev is the event expression underlying clocking_event, then the particular time step is the kth strictly prior time step in which the event ev iff expression2 occurred. If there do not exist k strictly prior time steps in which the event ev iff expression2 occurred, then the value returned from the $past function is the default sampled value of expression1 (see 16.5.1).
Thus, for
// THough a==1, b==1 at initialization, their default values is 1'b0
b |-> ($past(a,2) == 1 )
// at t15, ($past(a,2) == 0) because the default values of b is 0
Ben Cohen
Ben@systemverilog.us
Link to the list of papers and books that I wrote, many are now donated.
1 Like