What is UVM generator?

In reply to chiranji.vamshidhar:

2 guess works (in the absence of OP not showing the source of this term “generators”)

  1. Plain SV, VMM and the likes used this term. Equivalent here is sequencer, though really the generation is done inside sequence body and tunnelled through SQR-Driver.

  2. There are some “generators” of UVM code base. This would generate/create a full set of UVM components, interface, assertions etc. It could also create scripts for various EDA tools. One such generator is from our new venture VerifWorks.com and is freely available for download at: http://verifworks.com/products/dvcreate-uvm/

HTH
Srini
www.verifnews.org