what are difference between .sv and .svh file?
which baisc systemverilog struct file should be defined .sv?
which baisc systemverilog struct file should be defined .svh?
what are difference between .sv and .svh file?
which baisc systemverilog struct file should be defined .sv?
which baisc systemverilog struct file should be defined .svh?
In reply to wszhong631:
The difference is the name of the file. Seriously.
The typical convention is that *.sv files are placed on the compilers command line, whereas *.svh files are read by `include directives from other files
The only files that should be read by include are macro
defines and design units that are split into multiple files for collaborative source control. For example, each class in a package is typically put into a separate file. You may want to read my post about `include versus import: SystemVerilog Coding Guidelines: Package import versus `include - Verification Horizons
In reply to dave_59:
Hi Dave,
Other than readability aspect, why do we bother splitting the systemverilog code into .svh (header) and .sv (implementation) files?
Thanks,
Madhu
In reply to mseyunni:
It is also for code management. Ever work on a project with multiple people writing code in the same file?
In reply to dave_59:
In reply to mseyunni:
It is also for code management. Ever work on a project with multiple people writing code in the same file?
I want to know more about how file extensions are useful in above case where we have multiple people writing on the same file. Thanks.
The way I use it is, as you said in above statement, when we use a file on compiler command line, generally “.sv” is used. For e.g. any SystemVerilog module like “module”, “interface”, “package” we define “.sv” extension. Whereas for include files, which are SV Class, we use “.svh” extension. Same approach is used to write UVM BCL as well.
In reply to MayurKubavat:
I think we have come full circle in this thread. There are two different but related issues here.
The reason we split code up into multiple files is for readability and maintenance. We don’t want multiple people modifying the same file at the same time. It may be hard to appreciate this if you’ve never worked on a project with multiple people trying to modify the same code, which is why I was asking the question.
Once the code is in multiple files, we use different file extensions to help us remember if the file needs to be put on the compiler’s command line or will be included from the source of another file. We use the 'h' suffix to indicate a file to be
included mainly because that the convention in many other programming languages. ‘h’ stands for header, or the prototypes of routines without their implementation. SystemVerilog does not really have the same need for header files, but people still the ‘header’ terminology to indicate a file that needs to be `included.
Hi, it’s probally like the headers files (*.h) in C\C++ languages.