In reply to atabey:
You have to explain what you mean by ‘memory leak’. The SystemVerilog language handles all memory allocation/deallocation for you, so there is nothing you as a user can do to control it.
In reply to atabey:
You have to explain what you mean by ‘memory leak’. The SystemVerilog language handles all memory allocation/deallocation for you, so there is nothing you as a user can do to control it.