Valid parentheses sequence

SystemVerilog
,
2

In reply to akshataudpi:

This is a fun interview question

module top;
  class P;
    rand bit signed [1:0] parens[];
    function new;
      parens = new[6];
    endfunction
    constraint c {
      foreach(parens[i]){
        // 1 is open, -1 is close parenthesis
        parens[i] inside {1,-1};
        // can never have more close than open parenthesis in sequence
        parens.sum() with(item.index<=i? int'(item) : 0) >= 0;
      }
      // number of open and close parenthesis must be equal
      parens.sum() with (int'(item)) == 0;

    }
    function void print;
      foreach(parens[i]) if (parens[i] > 0)
        $write("(");
      else
        $write(")");
      $display;
    endfunction
 endclass
  P p=new;
      initial repeat(10) begin
    assert(p.randomize);
    p.print;
  end
endmodule