UVM1.2 : uvm_traversal.svh giving uvm_component name constraint warning

In reply to cgales:

I have declared a class monitor like this

class wr_set_transaction_monitor extends uvm_monitor;

uvm_blocking_get_imp_addr #(ipm_transaction,wr_set_transaction_monitor) observed_address_collected_port;
uvm_blocking_transport_imp_data #(ipm_transaction,ipm_transaction,wr_set_transaction_monitor) observed_wr_data_collected_port;
ipm_transaction transaction;

And the warning is coming ONLY for observed_wr_data_collected_port (which is of uvm_blockin_transport type . There are multiple other types of TLM ports I have added in my environment, but this warning is coming for this port only.

Where do you think the semi colon is causing these warnings.

Why this check was enabled in uvm 1.2 , is there any use of it ? Please assist ?