Uvm_scoreboard out_of_order implementation

UVM
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1

Hello,

can someone help me to implement scoreboard logic
DUT which taken input address in order A1,B1,C1 and output address in any order ex B1,C1,A1 (out of order)

Thanks

2

In reply to dddvlsique:

I would implement something on the below lines.

  • Capture your input address on the input monitor and send it to the scoreboard.
  • Capture your output address on the input monitor and send it to the scoreboard.
  • The idea is to capture all inputs in an array/queue, and delete the ones that show up on the output side.
  • Use a suitable datastructure to track inputs and outputs. Associative arrays seem a good choice here. (You can also use Queues, but Queues aren’t most efficient at deleting from the middle).
  • You can notice that I have only functions in my scoreboard. This is usually a good idea in most cases.
  • You can implement a timeout logic in your sequence, and flag any pending inputs in the report phase.

I have a simple systemverilog code below (you can easily convert the below to UVM).


class my_scoreboard;
   
  int address_aa [int];
  
  function void write_inputmonitor(int A_input);
    address_aa[A_input] = 1;
    $display("address_da = %p", address_aa);
  endfunction
 
  function void write_outputmonitor(int A_output);
    if(address_aa.exists(A_output)) begin
      $display("Found address %0d", A_output);
      address_aa.delete(A_output);
    end else 
      $error("Output address %0d not part of input", A_output);
  endfunction
  
  function void check_timeout();
    if(address_aa.size()==0) $display("Pass");
    else                     $error("Some addresses haven't been output yet.");
  endfunction
 
endclass



module test;
  
  my_scoreboard sb = new();
  
  initial begin
    //Inputs
    #10; sb.write_inputmonitor(10);
    #10; sb.write_inputmonitor(20);
    #10; sb.write_inputmonitor(30);
    //Outputs
    #10; sb.write_outputmonitor(20);
    #10; sb.write_outputmonitor(30);
    #10; sb.write_outputmonitor(10);
    //Timeout
    #50; sb.check_timeout();
  end
  
endmodule