Uvm reset during normal transaction

UVM
1

Hi All,

consider a normal driver code;

task run_phase (uvm_phase phase);
  forever begin
    seq_item_port.get(req);
    // Driving logic
    ...................
	driver_trans();
    ....................
    seq_item_port.put(rsp_item);
  end
endtask

task drive_trans();
//This is norma task to drive transactions;
//drive addr , wdata...
endtask

Let’s assume, there is a reset when transaction is going on.
Lets says, single transaction is 1KB of data transfer,
In the middle of 1KB transfer, reset got asserted.
I should complete the remaining potion in 1KB and then come out from main/run_phase or stop the simulation.
Basically when reset is asserted, I should complete the current transaction and no new next transactions.
How I can achive this?

I do also have reset task like;

task reset_detected;
wait (vif.reset==1);
//then ?
endtask

Could you please suggest?

2

Do you know this link