Uvm_registry: Too many arguments to 'new'

UVM
, , ,
1

hello everyone!
i’m facing a trouble with my virtual sequence (or, more likely, with my parameterized sequencer)

class enchancer_virtual_sequence extends uvm_sequence#( uvm_sequence_item );

  v_data_sequencer	#(
			.V_DATA_WIDTH(V_DATA_WIDTH),
			.N_COMP(N_COMP_IN),
			.Y_WIDTH(Y_WIDTH),
			.X_WIDTH(X_WIDTH)
			)  v_data_seqr;

  enchancer_coefs_sequencer 	enchancer_coefs_seqr;
	
  v_data_sequence 					v_data_seq;
  enchancer_coefs_sequence 	enchancer_coefs_seq;
	
  function new( string name = "" );
     super.new( name );
  endfunction: new

  task body();
    fork: f_block
	begin
	  v_data_seq = v_data_sequence::type_id::create( .name( "v_data_seq" ) );
	  v_data_seq.start( .sequencer( v_data_seqr ), .parent_sequence( this ) );
	  disable f_block;
	end
			
	begin
	  forever
	    begin
	     enchancer_coefs_seq = enchancer_coefs_sequence::type_id::create( .name( "enchancer_coefs_seq" ) );
	     enchancer_coefs_seq.start( .sequencer( enchancer_coefs_seqr ), .parent_sequence( this ) );
	  end
	end
join

 endtask: body
   
   `uvm_object_utils( enchancer_virtual_sequence )
      // `uvm_field_object( v_data_seq,         	 UVM_ALL_ON )
      // `uvm_field_object( enchancer_coefs_seq,  UVM_ALL_ON )
 //  `uvm_object_utils_end
endclass: enchancer_virtual_sequence

when i declare v_data_sequencer (line (2) in code) i have following error:

# ** Error: (vsim-3046) C:/Program Files/Mentor Questasim SE 10b/win32/../verilog_src/uvm-1.0p1/src/base/uvm_registry.svh(64): Too many arguments to 'new'. Expected 1, found 2.
#         Region: /uvm_pkg::uvm_component_registry::uvm_component_registry__10

it actually blew my mind: i can’t understand, what am i doing wrong?

here’s code for my sequencer and sequence_item:

class v_data_transaction #(
					parameter V_DATA_WIDTH = 10,
					parameter N_COMP       = 1,
				        parameter Y_WIDTH      = 10, 
					parameter X_WIDTH      = 10 
				) extends uvm_sequence_item;
  
  rand bit	[N_COMP-1:0]	[V_DATA_WIDTH-1:0] 	v_data;
  bit 			[Y_WIDTH-1:0]       		y; 
  bit 			[X_WIDTH-1:0]       		x;
  bit                     				x_active; 

  function new( string name = "" );
    super.new( name );
  endfunction: new
  
	
  `uvm_object_param_utils_begin( v_data_transaction #(
						.V_DATA_WIDTH(V_DATA_WIDTH),
					       .N_COMP(N_COMP),
         					.Y_WIDTH(Y_WIDTH),
                                             .X_WIDTH(X_WIDTH)
		                         )
																	)
    `uvm_field_int ( v_data,  	UVM_ALL_ON )
		`uvm_field_int ( y, 				UVM_ALL_ON )
		`uvm_field_int ( x, 				UVM_ALL_ON )
		`uvm_field_int ( x_active,	UVM_ALL_ON )
  `uvm_object_utils_end
  
endclass: v_data_transaction


class v_data_sequencer #(
parameter V_DATA_WIDTH = 10,
parameter N_COMP       = 1,
parameter Y_WIDTH      = 10,
parameter X_WIDTH      = 10 
) extends uvm_sequencer#( v_data_transaction #(.V_DATA_WIDTH(V_DATA_WIDTH),
.N_COMP(N_COMP),
.Y_WIDTH(Y_WIDTH),
.X_WIDTH(X_WIDTH)
)
);																			

function new( string name = "" );
  super.new( name );
endfunction: new

`uvm_component_param_utils( v_data_sequencer #(
.V_DATA_WIDTH(V_DATA_WIDTH),
.N_COMP(N_COMP),
.Y_WIDTH(Y_WIDTH),
.X_WIDTH(X_WIDTH)
)
)
endclass

if i comment line (2) in my virtual sequence, this error disappers, so what is wrong with v_data_sequencer? would appreciate any help with this)

2

In reply to trogers:

Problem is inside constructor of your sequencer. You need to provide parent class since sequencer is a component.

3

In reply to electron:

whoops, you are right. thank you a lot.
btw, could you please give a short explanation, why do we need to provide parent class for uvm_components and not for uvm_objects?

4

In reply to trogers:

In general, uvm_component creates only once in simulation cycle, It creates the whole verification environment so it needs hierarchical approach. (each component is dependent on other component)

While object is independent entity. It constructs and deconstructs many times during the simulation process. Here there is no need of hierarchical approach, so parent-child functionality not exist.

5

In reply to electron:

thanks again)