Hi Chitlesh,
I have encountered this type of issue earlier and followed the below approach to successfully predict the register 0xA.
//Step1: Write operation on register 0xB
reg_model.reg_B.write(status,<some_value>);
//Step2: wait by continuously polling the “is_busy” of 0xA
while(1) begin
if(reg_model.reg_A.is_busy == 1) begin
continue;
end
else begin
reg_model.reg_A.predict(<some_value>);
break;
end
end
//Step3: Now, check the contents of register 0xA in DUT with that of Register Model.
reg_model.reg_A.mirror(status,UVM_CHECK);
NOTE
Please be careful when you use this kind of implementation, if you are using this kind of logic in reference model and many drivers are connected and based on the testcase random stimuli related to these registers is being continuously driven onto the DUT then, in some corner case the prediction might not happen and the test fails.
Thanks,
Neith