The report and final phases are function calls, and cannot block. The only reason you you could get a hang in those phases is if you had coding error that executed an infinite loop.
The UVM does not require those phases, and it really does not matter if your base, or extended, or both have those phases. That is upt to the testbench architect.
Most likely you have a component stuck in the run_phase. Without seeing any code, it is going to be hard to help you. And you might have too much code to show in this forum. I suggest you try some of the UVM debugging techniques or use your tools interactive debugger.