Hi.
In the early version of UVM, The excution order is new(),build(),connect()…run()…
and the RUN phase is bottom-up. In UVM1.1, there are some new task based phases are added : pre_reset, reset, post-reset … pre_main, main, post_main …
I would like to confirm :
1. can i assume those new phases are some sub phases of run phase?
2. excution order is: build, connect, end_of_elaboration, start_of_simulation, pre_reset, reset, post_reset, pre_conf, conf, post_conf, pre_main, main, post_main… ?
3. in the component hierachy, the same phase are also excuted bottom-up.
I have tried to set_config a enviroment variable in the body of a seq, and the seq is started from run_phase in my uvm_test. By putting get_config in post_main phase of my uvm_env, it works :
UVM_INFO /p/com/eda/synopsys/vcsmx/E-2011.03-SP1-2-B-1/etc/uvm-1.1/base/uvm_resource_db.svh(130) @ 0: reporter [CFGDB/SET] Configuration ‘*.vari’ (type int) set by = (int) 3
UVM_INFO test.sv(24) @ 0: env_ [env_] i am env post_main_phase
UVM_INFO /p/com/eda/synopsys/vcsmx/E-2011.03-SP1-2-B-1/etc/uvm-1.1/base/uvm_resource_db.svh(130) @ 0: reporter [CFGDB/GET] Configuration ‘env_.vari’ (type int) read by env_ = (int) 3
but if changing post_main_phase() in my env to run_phase(), it wont work. is it correct behavir?
thanks
andrew