Generally, inside any monitor, we will be monitoring the interface at every posedge of the clock (as an example show below).
run_phase()
forever begin
@(posedge PCLK);
This is not the optimized way of monitoring the interface. Because we will not be sending the transaction at every posedge of the clock. So, is there any other Optimized way of writing capturing logic?
In reply to Abuzar Gaffari:
For APB the transaction occurs when PSEL , PENABLE and PREADY are all high on posedge of PCLK .
Using the same logic :
forever @(posedge PCLK) begin
if( ( PSEL & PENABLE & PREADY ) == 1 )
begin
// Logic here
end
end
In reply to MICRO_91:
Why are we checking at every clock edge? we should check for transaction only when we are driving the transaction. Don’t you think checking at every edge is not optimized way?
In reply to Abuzar Gaffari:
Optimized for what?
The monitor does not know when there is a transaction being driven unless it checks the bus every cycle. Without knowing the exact protocol being used, there might be a way to suspend the process until a certain signal changes, but there might not be much benefit.
Whenever you are concerned about performance, you should be using your tool’s performance profiling features to make sure you are spending effort in the most effective areas. The problem areas are not always where you think they are.
In reply to dave_59:
In reply to Abuzar Gaffari:
The monitor does not know when there is a transaction being driven unless it checks the bus every cycle.
Can we make use of events so that monitor will get to know when the transaction is being driven? If yes then is there any other method other than usage of events?
In reply to Abuzar Gaffari:
The point of separating the driver and monitor serves two purposes