In reply to manasa-n:
Does this reflect your testbench hierarchy?
Please modify the run_phase of your driver accordingly:
task run_phase(uvm_phase phase);
simple_seq_item req;
seq_item_port.get_next_item (req);
`uvm_info(get_type_name(), req.sprint, UVM_MEDIUM) //diagnostic message
drive();
seq_item_port.item_done();
endtask
Please post some more data from your simulation log-file before the FATAL error.