In reply to chr_sue:
Tq Mr chr_sue,
Can you help on this,
I want write a uvm code for simple logic gate, with inputs of int-a,int_b output is out,
i want to randomize inputs for generation output with uvm components only,
so, i’m unable to randomize those inputs can you check it ones
**http://www.edaplayground.com/x/ttv**
Thanks,