UVM Constraint Randomization does not work as expected

This expression does not do what you think it does:


0 < q_id < 8

If you want the variable to be greater than 0 and less than 8, one way to do it is to use 2 expressions. Here is a complete example:

class q_vseq;
    rand int q_id;
    constraint q_id_c {
        0 < q_id;
        q_id < 8;
    }
endclass : q_vseq

module tb;

q_vseq q;

initial begin
    q = new();
    repeat (5) begin
        if (!q.randomize()) $display("fail");
        $display(q.q_id);
    end
end
endmodule

Here is another way:


    constraint q_id_c { q_id inside {[1:7]}; }