UVM Backdoor Write is not working as expected

UVM
,
1

Hi
I m trying a UVM backdoor write from a sequence.
The steps which i follow are :

  1. In the build phase of the reg file where the register classes are built, i add
    reg_name.add_hdl_path_slice( inst1.inst2.inst3.reg_name_sig,0,32); where reg_name is the instance of the register of interest and reg_name_sig is the output of the instance inst3 in the design.
  2. In the build phase of the reg model where the reg file is built ( rf is the register file instance) i add
    add_hdl(uvm_env_top.tbench_top.DUT, RTL); where uvm_env_top is a module in which the testbench top module is instantiated. The DUT is the instance of the RTL in testbenchtop module
  3. In the register sequence, i call the following API
    rm.rf.reg_name.write(status, data, UVM_BACKDOOR); where rm is the register model instance
  4. In the log file, I observe the statement :
    Wrote register via DPI backdoor: rm.reg_name = 0x01
    But I do not observe the same in the waveform.
    The signal DUT.inst1.inst2.inst3.reg_name_sig is still 0 and the write doesnt take effect
    Can anyone please give me inputs on whether the method i followed for backdoor write is correct. If not, what is to be done?
2

In reply to Girisha Angadi Basavaraja:

Hi Girisha
Thanks for the input, but that doesn’t help much because the register also doesn’t reflect the value written.

3

In reply to Girisha Angadi Basavaraja:

Hi Girisha,

What about there’re some registers don’t exist so that the hdl_path won’t match them and reports UVM_ERROR for not found the hdl path. Is it the reason why the APB bus still have signal changes?

Thank you!

Regards,
Wenjun

4

In reply to Girisha Angadi Basavaraja:

Hi Girisha,

I’m trying to add hdl_path according to types of registers like global, statistics regs .etc

Almost all of the registers are from 0 to ff, but some of them like global_reg_0 doesn’t exist. I added their hdl_path by type so that the hdl_path of global_reg_0 is generated though there’s no such reg. Then UVM reports error about not found the hdl_path.

Thank you!

Regards,
Wenjun

5

In reply to Girisha Angadi Basavaraja:

Hi Girisha,

Thank you. I’ll keep digging.

Regards,
Wenjun