UVM analysis port broadcasting issue

Hi everyone,

I am facing an issue in analysis port fifo get method.
I have connected analysis port of one component(A) to 2 other component(B & C).
Component A;
port_A.write(tr);

Component B;
Fifo_port_B.get(tr1);

Component C;
Fifo_port_C.get(tr1);

For the initial few write in A, i got transaction in get method of B and C. After some writes, only B was getting transaction and C got stuck.

I have also used clone method but still the issue not fixed.

Please held me with this one.

Regards,
Ganesh

In reply to ganesh shetti:
It should work. Example for your reference :


`include "uvm_macros.svh"
import uvm_pkg::*;

////////////////////
class transaction extends uvm_object; 

    rand int data;
    `uvm_object_utils_begin(transaction)
        `uvm_field_int(data, UVM_DEFAULT);
    `uvm_object_utils_end

    function new(string name = "transaction");
        super.new(name);
    endfunction 
   
endclass 

//////////////////// component_a  
class component_a extends uvm_component;
  
  transaction trans;
  uvm_analysis_port#(transaction) analysis_port;
  
  `uvm_component_utils(component_a)

  function new(string name, uvm_component parent);
    super.new(name, parent);
    
    analysis_port = new("analysis_port", this);
  endfunction : new
  

  virtual task run_phase(uvm_phase phase);
    phase.raise_objection(this);
    
    repeat(10) begin
        #100ns;
        trans = transaction::type_id::create("trans", this);
        void'(trans.randomize());
        `uvm_info(get_type_name(),$sformatf("comp_a: Printing trans, \n %s",trans.sprint()),UVM_LOW)
        analysis_port.write(trans);
    end

    phase.drop_objection(this);
  endtask : run_phase
endclass : component_a

//////////////////// component_b
class component_b extends uvm_component;
  
  transaction trans;
  uvm_tlm_analysis_fifo #(transaction) analy_fifo_b;  
  `uvm_component_utils(component_b)
  
  function new(string name, uvm_component parent);
    super.new(name, parent);
    analy_fifo_b = new("analy_fifo_b", this);
  endfunction : new
  
  virtual task run_phase(uvm_phase phase); 
    forever begin
        analy_fifo_b.get(trans);
        `uvm_info(get_type_name(),$sformatf("comp_b: Printing trans, \n %s",trans.sprint()),UVM_LOW)
    end
  endtask : run_phase
endclass : component_b

//////////////////// component_c 
class component_c extends uvm_component;
  
  transaction trans;
  //Step-1. Declaring analysis FIFO
  uvm_tlm_analysis_fifo #(transaction) analy_fifo_c;  
  `uvm_component_utils(component_c)
  
  function new(string name, uvm_component parent);
    super.new(name, parent);
    analy_fifo_c = new("analy_fifo_b", this);
  endfunction : new
  
  virtual task run_phase(uvm_phase phase); 
    forever begin
        analy_fifo_c.get(trans);
        `uvm_info(get_type_name(),$sformatf(" comp_c : Printing trans, \n %s",trans.sprint()),UVM_LOW)
    end
  endtask : run_phase
endclass : component_c

//////////////////// component_env
class comp_env extends uvm_component;
  
  `uvm_component_utils(comp_env)
  component_a comp_a; 
  component_b comp_b; 
  component_c comp_c; 
 

  function new(string name, uvm_component parent);
    super.new(name, parent);
  endfunction : new
 
  function void build_phase(uvm_phase phase);
        super.build_phase(phase);
        comp_a = component_a::type_id::create("comp_a",this);
        comp_b = component_b::type_id::create("comp_b",this);
        comp_c = component_c::type_id::create("comp_c",this);
  endfunction 
  
  function void connect_phase(uvm_phase phase);
        super.connect_phase(phase);
        comp_a.analysis_port.connect(comp_b.analy_fifo_b.analysis_export); 
        comp_a.analysis_port.connect(comp_c.analy_fifo_c.analysis_export); 
  endfunction 
 
endclass : comp_env

////////////////////  
program my_program;
    initial begin
        $timeformat(-9,3,"ns",12);
        run_test("comp_env");
    end
endprogram 


//output :
UVM_INFO @ 0.000ns: reporter [RNTST] Running test comp_env...
UVM_INFO uvm_tmp.sv(47) @ 100.000ns: uvm_test_top.comp_a [component_a] comp_a: Printing trans, 
 -------------------------------------
Name    Type         Size  Value     
-------------------------------------
trans   transaction  -     @602      
  data  integral     32    'h86db24b9
-------------------------------------

UVM_INFO uvm_tmp.sv(79) @ 100.000ns: uvm_test_top.comp_b [component_b] comp_b: Printing trans, 
 -------------------------------------
Name    Type         Size  Value     
-------------------------------------
trans   transaction  -     @602      
  data  integral     32    'h86db24b9
-------------------------------------

UVM_INFO uvm_tmp.sv(106) @ 100.000ns: uvm_test_top.comp_c [component_c]  comp_c : Printing trans, 
 -------------------------------------
Name    Type         Size  Value     
-------------------------------------
trans   transaction  -     @602      
  data  integral     32    'h86db24b9
-------------------------------------

UVM_INFO uvm_tmp.sv(47) @ 200.000ns: uvm_test_top.comp_a [component_a] comp_a: Printing trans, 
 -------------------------------------
Name    Type         Size  Value     
-------------------------------------
trans   transaction  -     @603      
  data  integral     32    'h3090bc42
-------------------------------------

UVM_INFO uvm_tmp.sv(79) @ 200.000ns: uvm_test_top.comp_b [component_b] comp_b: Printing trans, 
 -------------------------------------
Name    Type         Size  Value     
-------------------------------------
trans   transaction  -     @603      
  data  integral     32    'h3090bc42
-------------------------------------

UVM_INFO uvm_tmp.sv(106) @ 200.000ns: uvm_test_top.comp_c [component_c]  comp_c : Printing trans, 
 -------------------------------------
Name    Type         Size  Value     
-------------------------------------
trans   transaction  -     @603      
  data  integral     32    'h3090bc42
-------------------------------------
.....
.....
.....

In reply to Rahulkumar:

Your problem is in component_c. Look here:

  function new(string name, uvm_component parent);
    super.new(name, parent);
    analy_fifo_c = new("analy_fifo_b", this); //There is a typo.
  endfunction : new

The marked line should be

analy_fifo_c = new("analy_fifo_c", this);

In reply to Rahulkumar:

Yes, code is the same. Format is correct but still the issue is present.

In reply to ganesh shetti:

Please see here: