- Can anyone tell me the difference between Universal Verification Component (UVC), Agent & Verification IP(VIP). How we can integrate VIP ?
- I studied about active & passive agents. What are master & slave agents ? If DUT is APB slave, then how many master/slave agents i need in which mode active or passive ?
In reply to shekher201778:
- These terms are sometimes used interchangeably, but I’ll give you my opinion based on my experience
- 2. VIP is the broadest term for a bundle of things used to verify a particular protocol or algorithm. It can include code written in different languages, as well as test plans, sets of tests, assertions, and scripts to execute all of that.
3. UVC’s are VIP that is specifically designed to integrate into a UVM testbench.
4. An Agent is the hierarchy of classes consisting of the driver, monitor, and set of sequences used to simulate a particular interface to your DUT.
- An agent is passive when the driver is turned off or does not exist and only monitors signals from the DUT. A master agent is active and initiates actions that the DUT must respond to. A slave agent is also active but only responds to actions from the DUT.
In reply to dave_59:
Thanks dave_59.
So if my DUT is APB slave, then i need only 1 active master agent consisting of sequencer, driver to drive stimulus into DUT, monitor to sample inputs driven into DUT & outputs coming out as response from DUT. Inputs are send to predictor/coverage collector & outputs are sent to scoreboard. Am i right ? Please correct me if i am wrong.
In reply to shekher201778:
It depends on the environment your DUT is expected to operate in. Typically there is only 1 master, and even if there are multiple masters, there is an arbiter that would look like a single master to the slave anyways. But there could be multiple slaves. You might want to check that your slave does not interfere with the operation of other slaves.
In reply to dave_59:
Hi dave_59. Can you share any link or video tutorials on VIP & how to integrate it into uvm testbench.
In reply to shekher201778:
You should ask the people who provided the VIP.
In reply to dave_59:
Hi dave_59. I just want to confirm my understanding of agents & their types. I request you to correct me if i am wrong.
- Agents can be either master or slave & can be configured as active & passive.
- If DUT has only 1 slave interface like apb slave, then there will be 1 agent which must be active master agent containing sequencer, driver & monitor. Driver will drive stimulus into DUT & monitor will capture both txns i.e inputs driven into DUT & outputs coming out of DUT in 2 separate parallel process during run phase of monitor.
- If DUT has only 1 master interface like apb master, then there will be 1 agent which must be active slave agent that acts as responder. Sometimes it is also referred as reactive agent.
- If DUT have ‘n’ master & slave interfaces, then there will be ‘n’ agents. For each DUT slave interface, there will be one active master. For each DUT master interface, there will be one active slave agent acting as responder.
In reply to shekher201778:
According to my understanding also, all the statements which you have mentioned are correct.
Thanks,
Manikanta K.
In reply to shekher201778:
Agree with everything. I do see one agent configurable with M masters and S slaves which might be simpler to set up.
In reply to dave_59:
Hi dave_59
1)Can you refer any article or tutorial video to understand uvm_event & uvm_callbacks & how to use them.
2)Recently i came to know about 2 types of UVCs (UVM verification components): Module UVC & Interface UVC. But i have no idea about these UVCs. Can you tell me what are these UVCs means ?
Thanks