Use of abstract class

SystemVerilog
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1

Hi,
What is the use of abstract classes and where can we use it?

Thanks,
Tarun

2

Abstract classes are those which can be used for creation of handles. However their methods and constructors can be used by the child or extended class. The need for abstract classes is that you can generalize the super class from which child classes can share its methods.

3

In reply to perumallatarun:

Abstract classes are those that can never be constructed directly - you must extend them into derived classes and you can construct the derived classes. You can declare a abstract class variable that can hold a handle to a class object that has been derived for the abstract class.

Base class libraries like the UVM are made up of many abstract classes. There is no reason to ever construct a base class like uvm_object or uvm_component - you must extend it with the behaviors you need first.