Tried generating a pattern but unable to get the pattern as expected

SystemVerilog
1

I have to generate below pattern
0 0 0
0 1 2
2 0 0
0 3 4
4 0 0
0 5 6
6 0 0
0 7 8
8 0 0
0 9 10
10 0 0
0 11 12
12 0 0
0 13 14
14 0 0
0 15 16
16 0 0
0 17 18
18 0 0
0 19 20
20 0 0
0 21 22
22 0 0
0 23 24
24 0 0
0 25 26
26 0 0
0 27 28
28 0 0
0 29 30
30 0 0
0 31 32
32 0 0
0 33 34
34 0 0
0 35 36
36 0 0
0 37 38
38 0 0
0 39 40
40 0 0
0 41 42
42 0 0
0 43 44
44 0 0
0 45 46
46 0 0
0 47 48
48 0 0
0 49 50
50 0 0
0 51 52
52 0 0
0 53 54
54 0 0
0 55 56
56 0 0
0 57 58
58 0 0
0 59 60
60 0 0
0 61 62
62 0 0
0 63 64
64 0 0
0 65 66
66 0 0
0 67 68
68 0 0
0 69 70
70 0 0
0 71 72
72 0 0
0 73 74
74 0 0
0 75 76
76 0 0
0 77 78
78 0 0
0 79 80
80 0 0
0 81 82
82 0 0
0 83 84
84 0 0
0 85 86
86 0 0
0 87 88
88 0 0
0 89 90
90 0 0
0 91 92
92 0 0
0 93 94
94 0 0
0 95 96
96 0 0
0 97 98
98 0 0
0 99 100
100 0 0
0 101 102
102 0 0
0 103 104
104 0 0
0 105 106
106 0 0
0 107 108
108 0 0
0 109 110
110 0 0
0 111 112
112 0 0
0 113 114
114 0 0
0 115 116
116 0 0
0 117 118
118 0 0
0 119 120
120 0 0
0 121 122
122 0 0
0 123 124
124 0 0
0 125 126
126 0 0
0 127 128
128 0 0
0 129 130
130 0 0
0 131 132
132 0 0
0 133 134
134 0 0
0 135 136
136 0 0
0 137 138
138 0 0
0 139 140
140 0 0
0 141 142
142 0 0
0 143 144
144 0 0
0 145 146
146 0 0
0 147 148
148 0 0
0 149 150
150 0 0
0 151 152
152 0 0
0 153 154
154 0 0
0 155 156
156 0 0
0 157 158
158 0 0
0 159 160
160 0 0
0 161 162
162 0 0
0 163 164
164 0 0
0 165 166
166 0 0
0 167 168
168 0 0
0 169 170
170 0 0
0 171 172
172 0 0
0 173 174
174 0 0
0 175 176
176 0 0
0 177 178
178 0 0
0 179 180
180 0 0
0 181 182
182 0 0
0 183 184
184 0 0
0 185 186
186 0 0
0 187 188
188 0 0
0 189 190
190 0 0
0 191 192
192 0 0
0 193 194
194 0 0
0 195 196
196 0 0
0 197 198
198 0 0
0 199 200
200 0 0
0 201 202
202 0 0
0 203 204
204 0 0
0 205 206
206 0 0
0 207 208
208 0 0
0 209 210
210 0 0
0 211 212
212 0 0
0 213 214
214 0 0
0 215 216
216 0 0
0 217 218
218 0 0
0 219 220
220 0 0
0 221 222
222 0 0
0 223 224
224 0 0
0 225 226
226 0 0
0 227 228
228 0 0
0 229 230
230 0 0
0 231 232
232 0 0
0 233 234
234 0 0
0 235 236
236 0 0
0 237 238
238 0 0
0 239 240
240 0 0
0 241 242
242 0 0
0 243 244
244 0 0
0 245 246
246 0 0
0 247 248
248 0 0
0 249 250
250 0 0
0 251 252
252 0 0
0 253 254
254 0 0
0 255 0

It’s of RGB components

// Code your testbench here
// or browse Examples
module ramp();
  bit [11:0] r=0;
  bit [11:0] g=0;
  bit [11:0] b=0;
  bit [11:0] q_r[$];
  bit [11:0] q_g[$];
  bit [11:0] q_b[$];
  bit [35:0] q_p[$];
  bit [11:0]r_v;
  bit [11:0]g_v;
  bit [11:0]b_v;
  int i=0;
  int j=0;
  int k=0;
  initial
    begin
      r=0;
      g=0;
      b=0;
      q_r.delete();
      q_g.delete();
      q_b.delete();
      q_p.delete();
      for(i=0;i<255;i++)
        begin
          if(i%2==0)
            r = (i*2)/2;
          else
            r = 0;
          q_r.push_back(r);
          $display("r=%0d q_r[%0d]=%0d ",r,i,q_r[i]);
        end
      for(j=0;j<=256;j++)
        begin
          if(j%2==0)
            g = ((j*2)/2)-1;
          else
            g=0;
          q_g.push_back(g);
          $display("g=%0d q_g[%0d]=%0d",g,j,q_g[j]);
        end
      for(k=0;k<255;k++)
        begin
          if(k%2 != 0)
            b = k+1;
          else
            b = 0;
          q_b.push_back(b);
          $display("b=%0d q_b[%0d]=%0d",b,k,q_b[k]);
        end
      for(i=0;i<=256;i++)
        begin
          r_v = q_r.pop_front();
          g_v = q_g.pop_front();
          b_v = q_p.pop_front();
          q_p.push_back({r_v,g_v,b_v});
          $display("q_p[%0d]=%0d",i,q_p[i]);
        end
    end
endmodule

I tired the above code but it’s not working as expected. can someone help me?

2

You can try below code:
I am printing the pattern but you store it in queue and print it later. Hope this helps!

class pattern;
  
  function void gen_pat1(int N);
    bit [7:0] i,;
    int count=0;
    for( i=0;i<N;i=i+2)begin
      $display("%0d,%0d,%0d" , i ,0,0);
      $display("%0d,%0d,%0d" , 0, 8'(i+1),8'(i+2));
      count=count+2;
      if(count==N)
        break;
    end
  endfunction:gen_pat1
    
endclass:pattern

module top;
  
  pattern pattern_h;
  
  initial begin
    
    pattern_h =new();
    pattern_h.gen_pat1(256);
    
  end
  
endmodule:top