Top-down bottom-up build & connect phase

UVM
1

Hi,

Why we need to build components in top-down fashion? Why cant we build it in reverse way?
Why we need to connect in bottom up fashion and why not in reverse way because connection is a just connection, what exact difference does it make?

Please help me out

Thanks
Anudeep J

2

In reply to Anudeep J:

Please refer to the below one.

https://verificationacademy.com/forums/uvm/calling-build-phase

3

In reply to Anudeep J:

Hi,

If you have created basic UVM testbench containing env, agent, driver etc. you would know that parent hierarchies needs to be created first to create next level of testbench components. Typically, build phase contains UVM factory create methods which creates UVM component in testbench. For e.g. Test creates Env, Env creates Agent. In-order to create Driver component, Agent needs to be created first, and Env before that. This is the reason build phase function is top-down.

For connect_phase() I personally feel it could have been top-down as well, and this would not create much of a difference. But application wise, I have one scenario where you pass sequencer component handle to test (passing something from below hierarchy to above one), where bottom-up approach is useful. However, technical answer for this has something to do with the way TLM ports are connected. But I do not have clear idea about this. Will let you know when I figure this out!

4

In reply to MayurKubavat:

Hi,
Any idea why connect phase is bottom-up?

5

In reply to sasi_8985:

It does not matter. Calling of build phase? | Verification Academy

6

In reply to dave_59:

Thanks Dave :-)