Tlm fifo as shifter register

In reply to alexkidd84:

Unfortunately I do not really understand why you need 10 clock cycles delay. Transactions are intended for use in transaction-level-modelling. On the transaction level you do not think in terms of clock cycles There is only the order of transactions important. When you need a transaction for further processing you can perform a get on a tlm_fifo and you’ll get it when there is one.