The interface port 'dif' must be passed an actual interface error

UVM
1

Hello, I’m new to UVM and I decided to just copy paste an example off of EDAPlayground and try to run it on Questasim
This is the example: EDA Playground “First Steps with UVM - Sequencer-Driver Comms”
I put the DUT and the UVM Code in seperate files, and ran this command:
vsim -c -sv_lib C:/questasim64_2024.1/uvm-1.2/win64/uvm_dpi work.dut -do “run -all”
Afterwards it gave me this error:** Fatal: (vsim-3695) The interface port ‘dif’ must be passed an actual interface.

Time: 0 ns Iteration: 0 Instance: /dut File: C:/questasim64_2024.1/examples/UvmAttempt1/dut.sv Line: 13

FATAL ERROR while loading design

Error loading design

What is the issue here?

2

The code that is posted on EDA Playground runs fine. You will need to post the code with the issue you are seeing.

3

Hello, yes that is exactly my point, I have copy pasted the code directly from EDAPlayground to Questasim and it gives me this error.

4

You need to make sure you are using the correct tool commands to compile and simulate your testbench.

Please refer to your tool documentation or contact your vendor support team for additional assistance.