Test class is running but in scoreboard $display is not printing massage and value

Hi,

I am trying to compile my 64/66b encoder using uvm but i am not able to see a scoreboard $display massage and value
please give me any suggestion where is i doing wrong

interface intf(input logic clk,rst);
logic [63:0] txd;
logic [7:0] txc;
logic [65:0] entxd;

endinterface

module adder(intf pif);

always @ (posedge pif.clk)
begin
if(pif.rst==0)
pif.entxd=66’b0;

else if(pif.txc==16'h00)
  begin
  
  pif.entxd={pif.txd[63:56],pif.txd[55:48],pif.txd[47:40],pif.txd[39:32],pif.txd[31:24],pif.txd[23:16],pif.txd[15:8],pif.txd[7:0],2'b01};
end
else if(pif.txc==16'hff)
  begin
    
    pif.entxd={pif.txd[63:56],pif.txd[56:50],pif.txd[49:43],pif.txd[42:36],pif.txd[35:29],pif.txd[28:22],pif.txd[21:15],pif.txd[14:8],16'h1e ,2'b10};
  end
  else if(pif.txc==16'h01)
    begin
      
      pif.entxd={pif.txd[63:56],pif.txd[55:48],pif.txd[47:40],pif.txd[39:32],pif.txd[31:24],pif.txd[23:16],pif.txd[15:8],16'h78,2'b10};
    end
  else if(pif.txc==16'hf1)
    begin
      
      pif.entxd={28'b0,pif.txd[36:32],pif.txd[31:24],pif.txd[23:16],pif.txd[15:8],16'h4b,2'b10};
    end
    else if(pif.txc==16'hff)
    begin
      
      pif.entxd={pif.txd[63:56],pif.txd[56:50],pif.txd[49:43],pif.txd[42:36],pif.txd[35:29],pif.txd[28:22],pif.txd[21:15],7'b0000000,16'h87,2'b10};
    end
    else if(pif.txc==16'hfe)
    begin
      
      pif.entxd={pif.txd[63:57],pif.txd[56:50],pif.txd[49:43],pif.txd[42:36],pif.txd[35:29],pif.txd[28:22],6'b000000,pif.txd[15:8],16'h99,2'b10};
    end
    else if(pif.txc==16'hfc)
    begin
      
      pif.entxd={pif.txd[63:57],pif.txd[56:50],pif.txd[49:43],pif.txd[42:36],pif.txd[35:29],5'b00000,pif.txd[23:16],pif.txd[15:8],16'haa,2'b10};
    end
    else if(pif.txc==16'hf8)
    begin
      
      pif.entxd={pif.txd[63:57],pif.txd[56:50],pif.txd[49:43],pif.txd[42:36],4'b0000,pif.txd[31:24],pif.txd[23:16],pif.txd[15:8],16'hb4,2'b10};
    end
    else if(pif.txc==16'hf0)
    begin
      
      pif.entxd={pif.txd[63:57],pif.txd[56:50],pif.txd[49:43],3'b000,pif.txd[39:32],pif.txd[31:24],pif.txd[23:16],pif.txd[15:8],16'hcc,2'b10};
    end
    else if(pif.txc==16'he0)
    begin
      
      pif.entxd={pif.txd[63:57],pif.txd[56:50],2'b00,pif.txd[47:40],pif.txd[39:32],pif.txd[31:24],pif.txd[23:16],pif.txd[15:8],16'hd2,2'b10};
    end
    else if(pif.txc==16'hc0)
    begin
      
      pif.entxd={pif.txd[63:57],1'b0,pif.txd[55:48],pif.txd[47:40],pif.txd[39:32],pif.txd[31:24],pif.txd[23:16],pif.txd[15:8],16'he1,2'b10};
    end
    else if(pif.txc==16'h80)
    begin
      
     
      pif.entxd={pif.txd[63:56],pif.txd[55:48],pif.txd[47:40],pif.txd[39:32],pif.txd[31:24],pif.txd[23:16],pif.txd[15:8],16'hd2,2'b10};
    end
  end
endmodule

include "uvm_macros.svh" import uvm_pkg::*; class seq_item extends uvm_sequence_item; uvm_object_utils(seq_item)
rand bit [7:0]txc;
rand bit [63:0]txd;
bit [65:0] entxd;
bit clk;
bit rst;

 function new(string name="seq_item");
	 super.new(name);
 endfunction

endclass

class base_seq extends uvm_sequence#(seq_item);
seq_item tx;
`uvm_object_utils(base_seq)

function new(string name=“base_seq”);
super.new(name);
endfunction

 task body();

  repeat(2) begin
    
   tx=seq_item::type_id::create("tx");
   
   start_item(tx);
    assert(tx.randomize);
    tx.print();
   finish_item(tx);
  end

 endtask

endclass

class adder_sequencer extends uvm_sequencer#(adder_txn);

 `uvm_component_utils(adder_sequencer)

 function new(string name,uvm_component parent);
     super.new(name,parent);
 endfunction

endclass

class driver extends uvm_driver#(seq_item);
seq_item tx;

virtual intf vif;

 `uvm_component_utils(driver)

 function new(string name,uvm_component parent);
     super.new(name,parent);
 endfunction

function void build_phase(uvm_phase phase);
void’(uvm_config_db #(virtual intf)::get(this,“”,“pif”,vif));
endfunction

 task run_phase(uvm_phase phase);
   wait(vif.rst);
$display("----rst started-----");
vif.entxd = 0;


wait(!vif.rst);
 $display("----rst ended-----");
     forever begin
         seq_item_port.get_next_item(tx);
            vif.txc=tx.txc;
            vif.txd=tx.txd;
            
            @(negedge vif.clk); 
         seq_item_port.item_done();

     end
 endtask

endclass

class monitor extends uvm_monitor;
virtual intf vif;
seq_item tx;
uvm_analysis_port#(seq_item) port;

`uvm_component_utils(monitor)

function new(string name,uvm_component parent);

     super.new(name,parent);

endfunction

function void build_phase(uvm_phase phase);
void’(uvm_config_db#(virtual intf)::get(this,“”,“pif”,vif));
port=new(“port”,this);
tx=seq_item::type_id::create(“tx”);

endfunction

task run_phase(uvm_phase phase);
wait(vif.rst);
$display(“----rst started-----”);
vif.entxd = 0;

wait(!vif.rst);
 $display("----rst ended-----");
 forever begin
   @(posedge vif.clk);
   tx.txc=vif.txc; 
   tx.txd=vif.txd; 
   
    @(negedge vif.clk); 
   tx.entxd=vif.entxd; 
   port.write(tx);

      
    


 end

endtask

endclass

class agent extends uvm_agent;
sequencer sqr;
driver dvr;
monitor mon;
`uvm_component_utils(agent)

 function new(string name,uvm_component parent);
     super.new(name,parent);
 endfunction
 function void build_phase(uvm_phase phase);
     sqr=sequencer::type_id::create("sqr",this);
     dvr=driver::type_id::create("dvr",this);
     mon=monitor::type_id::create("mon",this);
 endfunction
 function void connect_phase(uvm_phase phase);
 
     dvr.seq_item_port.connect(sqr.seq_item_export);
 endfunction

endclass

class scoreboard extends uvm_scoreboard;
seq_item tx;
uvm_analysis_imp#(seq_item,scoreboard) imp;
bit [65:0]entxd;

`uvm_component_utils(scoreboard)

function new(string name,uvm_component parent);
super.new(name,parent);
endfunction

function void build_phase(uvm_phase phase);
imp=new(“imp”,this);
tx=seq_item::type_id::create(“tx”);

endfunction

function void write(seq_item tx1);
this.tx=tx1;

  if(tx.rst==1)
    begin
  entxd=66'b0;
  if(entxd==tx.entxd)
    $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
	    else
  		      $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
		      end
		      
		      else if(tx.txc==16'h00)
  begin
  
  entxd={tx.txd[63:56],tx.txd[55:48],tx.txd[47:40],tx.txd[39:32],tx.txd[31:24],tx.txd[23:16],tx.txd[15:8],tx.txd[7:0],2'b01};
  if(entxd==tx.entxd)
    $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
	    else
  		      $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
		      
end
		      
		      else if(tx.txc==16'hff)
  begin
    
    entxd={tx.txd[63:56],tx.txd[56:50],tx.txd[49:43],tx.txd[42:36],tx.txd[35:29],tx.txd[28:22],tx.txd[21:15],tx.txd[14:8],16'h1e ,2'b10};
    if(entxd==tx.entxd)
    $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
	    else
  		      $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
		      
  end
   else if(tx.txc==16'h01)
    begin
      
      entxd={tx.txd[63:56],tx.txd[55:48],tx.txd[47:40],tx.txd[39:32],tx.txd[31:24],tx.txd[23:16],tx.txd[15:8],16'h78,2'b10};
      if(entxd==tx.entxd)
    $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
	    else
  		      $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
		      end
  		        else if(tx.txc==16'hf1)
    begin
     
    entxd={28'b0,tx.txd[36:32],tx.txd[31:24],tx.txd[23:16],tx.txd[15:8],16'h4b,2'b10};
    if(entxd==tx.entxd)
    $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
	    else
  		      $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
		      end
    else if(tx.txc==16'hff)
    begin
      
      entxd={tx.txd[63:56],tx.txd[56:50],tx.txd[49:43],tx.txd[42:36],tx.txd[35:29],tx.txd[28:22],tx.txd[21:15],7'b0000000,16'h87,2'b10};
      if(entxd==tx.entxd)
    $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
	    else
  		      $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
		      
    end
    else if(tx.txc==16'hfe)
    begin
      
      entxd={tx.txd[63:57],tx.txd[56:50],tx.txd[49:43],tx.txd[42:36],tx.txd[35:29],tx.txd[28:22],6'b000000,tx.txd[15:8],16'h99,2'b10};
      if(entxd==tx.entxd)
    $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
	    else
  		      $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
		      
    end
     else if(tx.txc==16'hfc)
    begin
      
      entxd={tx.txd[63:57],tx.txd[56:50],tx.txd[49:43],tx.txd[42:36],tx.txd[35:29],5'b00000,tx.txd[23:16],tx.txd[15:8],16'haa,2'b10};
      if(entxd==tx.entxd)
    $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
	    else
  		      $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
		      
    end
    else if(tx.txc==16'hf8)
    begin
      
      entxd={tx.txd[63:57],tx.txd[56:50],tx.txd[49:43],tx.txd[42:36],4'b0000,tx.txd[31:24],tx.txd[23:16],tx.txd[15:8],16'hb4,2'b10};
      if(entxd==tx.entxd)
    $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
	    else
  		      $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
		      
    end
    else if(tx.txc==16'hf0)
    begin
      
      entxd={tx.txd[63:57],tx.txd[56:50],tx.txd[49:43],3'b000,tx.txd[39:32],tx.txd[31:24],tx.txd[23:16],tx.txd[15:8],16'hcc,2'b10};
      if(entxd==tx.entxd)
    $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
	    else
  		      $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
		      
    end
    else if(tx.txc==16'he0)
    begin
      
      entxd={tx.txd[63:57],tx.txd[56:50],2'b00,tx.txd[47:40],tx.txd[39:32],tx.txd[31:24],tx.txd[23:16],tx.txd[15:8],16'hd2,2'b10};
      if(entxd==tx.entxd)
    $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
	    else
  		      $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
		      
    end
    else if(tx.txc==16'hc0)
    begin
     
      entxd={tx.txd[63:57],1'b0,tx.txd[55:48],tx.txd[47:40],tx.txd[39:32],tx.txd[31:24],tx.txd[23:16],tx.txd[15:8],16'he1,2'b10};
      if(entxd==tx.entxd)
    $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
	    else
  		      $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
		      
    end
    else if(tx.txc==16'h80)
    begin
      
     
      entxd={tx.txd[63:56],tx.txd[55:48],tx.txd[47:40],tx.txd[39:32],tx.txd[31:24],tx.txd[23:16],tx.txd[15:8],16'hd2,2'b10};
      if(entxd==tx.entxd)
    $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
	    else
  		      $display( "Result match","tx.entxd=%0d & entxd=%0d  $time=%t",tx.entxd,entxd,$time);
		      
    end

endfunction
endclass

class env extends uvm_env;
agent agent1;
scoreboard sb;

 `uvm_component_utils(env)

 function new(string name,uvm_component parent);
     super.new(name,parent);
 endfunction



 function void build_phase(uvm_phase phase);
     agent1=agent::type_id::create("agent1",this);
     sb=scoreboard::type_id::create("sb",this);
     
 endfunction

 function void connect_phase(uvm_phase phase);
         agent1.mon.port.connect(sb.imp);
         
 endfunction

endclass

class base_test extends uvm_test;
env env1;
base_seq seq;

 `uvm_component_utils(base_test)

 function new(string name,uvm_component parent);
     super.new(name,parent);
 endfunction
 function void build_phase(uvm_phase phase);
     env1=env::type_id::create("env1",this);
     seq=base_seq::type_id::create("seq");
 endfunction



 task run_phase(uvm_phase phase);
   phase.raise_objection(this);

   // $display(top.dut.pif.a);
    

    seq.start(env1.agent1.sqr);
     
   phase.drop_objection(this);

 endtask

endclass

`include “uvm_macros.svh”
import uvm_pkg::*;

include "interf.sv" //interface include “dut123.sv” //DUT
include "seqitem.sv" //txn include “sequence123.sv” //sequence
include "driver12.sv" //driver include “monitor12.sv” //monitor
include "sequencer12.sv" //squencer include “agent12.sv” //agent

include "scoreboard12.sv" //scoreboard include “env12.sv” //env

module top;

`include “test12.sv” //test
bit clk;
bit rst;
intf pif(clk,rst);

adder dut(pif);

initial begin
uvm_config_db#(virtual intf)::set(uvm_root::get(),“*”,“pif”,pif);
run_test(“base_test”);
end

initial begin
clk=0;
rst=0;
#10;
rst=1;
forever #5 clk=~clk;
end

endmodule

`include “uvm_macros.svh”
import uvm_pkg::*;

include "interf.sv" //interface include “dut123.sv” //DUT
include "seqitem.sv" //txn include “sequence123.sv” //sequence
include "driver12.sv" //driver include “monitor12.sv” //monitor
include "sequencer12.sv" //squencer include “agent12.sv” //agent

include "scoreboard12.sv" //scoreboard include “env12.sv” //env

module top;

`include “test12.sv” //test
bit clk;
bit rst;
intf pif(clk,rst);

adder dut(pif);

initial begin
uvm_config_db#(virtual intf)::set(uvm_root::get(),“*”,“pif”,pif);
run_test(“base_test”);
end

initial begin
clk=0;
rst=0;
#10;
rst=1;
forever #5 clk=~clk;
end

endmodule

output-

** Note: (vsim-3813) Design is being optimized due to module recompilation…

Loading sv_std.std

Loading mtiUvm.uvm_pkg

Loading work.top1_sv_unit

Loading work.top(fast)

Loading work.intf(fast)

Loading C:\questasim_10.0b\uvm-1.0p1\win32\uvm_dpi.dll

run -all

----------------------------------------------------------------

UVM-1.0p1

(C) 2007-2011 Mentor Graphics Corporation

(C) 2007-2011 Cadence Design Systems, Inc.

(C) 2006-2011 Synopsys, Inc.

----------------------------------------------------------------

UVM_INFO @ 0: reporter [RNTST] Running test base_test…

----rst started-----

----rst started-----

In reply to taufeeq_khan:
Please use code tags or put your code to www.edaplayground.com.
Look to your write function in the SB
This is your code
function void write(seq_item tx1);
this.tx=tx1;
if(tx.rst==1)

But in your sequence item rst is 0.
Change it like this
function void write(seq_item tx1);
this.tx=tx1;
uvm_info(get_type_name(), $sformatf("SB received transaction tx = %p",tx), UVM_MEDIUM) if(tx.rst==0) then it will run. BTW NEVER and NEVER use $display in your UVM testbench. The UVM provides you a very powerful reporting mechanism with uvm_info
uvm_warning uvm_error
`uvm_fatal
Please use these constructs.