Task which always and forever is executed

SystemVerilog
,
1

I have the following task in my monitor:

   virtual task run_phase(uvm_phase phase);
      //wait(vif.cyc_tic == 1'b1) @(posedge vif.clk) #0 fact_log2_samp_t = vif.fact_log2_samp;
      forever begin
	 fork begin
	    wait(vif.cyc_tic == 1'b1) @(posedge vif.clk) #0 fact_log2_samp_t = vif.fact_log2_samp;
	    time_t = $time;	    
	    cur_time.push_back(time_t + 4000);
	 end
	    begin
	       mon_trx = tx_lin_int_transaction::type_id::create("mon_trx");
	       mon_trx.fact_log_2 = fact_log2_samp_init;
	       wait (vif.xn_valid == 1'b1);
	       #1;	 
	       mon_trx.rand_data_xi = vif.xi;
	       mon_trx.rand_data_xq = vif.xq;
	       time_t = cur_time.pop_front();		  	       
	       if (fact_log2_samp_t != fact_log2_samp_init) begin
		  time_v = $time;
		  mon_trx.check = FALSE;
		  $display("time_v is: %d, curr_time is: %d, sub is %d" , time_v, time_t, time_v-time_t);
		  if (((time_v-time_t)/4000) >= 46) begin
		     $display("time_v is: %d, curr_time is: %d" , time_v, time_t);
		     mon_trx.fact_log_2  = fact_log2_samp_t;
		     fact_log2_samp_init = fact_log2_samp_t;
		     //cur_time = 0;
		     mon_trx.check = TRUE;
		  end
	       end
	       $cast(t, mon_trx.clone());
	       //send transaction to scoreboard via TLM write()
	       ap.write(t);
	       wait (vif.xn_valid == 1'b0);
	    end
	 join_any
      end
   endtask: run_phase

I want that the first process (the first begin in the fork) executed constantly. However I can see when I debug that sometimes although

vif.cyc_tic == 1'b1

the code in the first process doesn’t execute’ and the cur_time queue doesn’t grow.

How can I achieve what I wish to- every time that

vif.cyc_tic == 1'b1

the code in the first process will execute.

2

In reply to saritr:
Whenever I see #0’s or #1 in a user’s code, I view that as a workaround for code they wrote and do not completely understand, or a workaround for code that someone else wrote who did not know what they were doing. If you must put #0 or #1 in your code, you need to document why you thought it was needed. In almost all cases, it’s not needed, or there is a much better way to write your code without it.

Without knowing all the timing of your signals, my best guess is to move the forever loops inside each process of the fork

fork
  begin : process1
    forever begin
        ...
    end
  end
  begin : process2
    forever begin
    ...
    end
  end
join

The join will never be reached, and that is OK for a monitor or driver.

3

In reply to dave_59:

I still have problem.
I I can see that the task of the scoreboard executed whille a new

vif.cyc_tic == 1'b1

, but the code in the first process doesn’t execute’ and the cur_time queue doesn’t grow.